Epsilon (@2Lysens) header
Epsilon (@2Lysens) profile picture

Hacker, surfer, engineer, retro-computer enthusiast

Bredene, Belgium
Joined October 2021
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A devlog update about the BoxLambda new-retro computer project. This post talks about the driver for the VERA graphics system. epsilon537.github.io/boxlamb…
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A new Blog post about BoxLambda OS's File System stack: epsilon537.github.io/boxlamb… #forth #homebrewcomputer #riscv
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I started working towards the BoxLambda OS architecture I outlined in my previous post. I ported Mecrisp Quintus Forth and added a Forth-C FFI: epsilon537.github.io/boxlamb… #forth #riscv #osdev #homebrewcomputer
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I just pushed a new BoxLambda release. The main additions are: - the BootLoader: boxlambda.readthedocs.io/en/… - a complete Register Map: boxlambda.readthedocs.io/en/… For a complete list of changes, please refer to the Release Notes: github.com/epsilon537/boxlam… #FPGA #RISCV
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In this post, I’ll explore ways to improve interrupt latency and jitter on the BoxLambda SoC. epsilon537.github.io/boxlamb… #FPGA #RISCV
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In this post, I remove more functionality than I’m adding, and the BoxLambda SoC becomes a lot simpler and faster as a result. I’ll also briefly describe how the RISC-V GNU toolchain for BoxLambda is built. epsilon537.github.io/boxlamb… #RISCV #FPGA
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BoxLambda system tweaking in search of consistent instruction cycle counts: epsilon537.github.io/boxlamb…
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No BoxLambda Blog post this time, but a big catch-up on Documentation: boxlambda.readthedocs.io/en/… and various loose ends: github.com/epsilon537/boxlam… All the gateware blocks are in place now 🥳🥳🥳
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Finally, another BoxLambda post. Today's topic is Partial FPGA Reconfiguration: epsilon537.github.io/boxlamb… Gateware is Software! #FPGA
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A new BoxLambda DevLog post: Keeping Time: RTCC and I2C epsilon537.github.io/boxlamb… #FPGA @zipcpu
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I just pushed a devlog post about adding adding Hardware and Timer Interrupt support to BoxLambda: epsilon537.github.io/boxlamb… #RISCV #FPGA
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BoxLambda Devlog: SPI Flash Access, Boot, and Core. epsilon537.github.io/boxlamb… @zipcpu #FPGA #RISCV
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BoxLambda Devlog: On USB HID, Keyboard LEDs, and device emulation. epsilon537.github.io/boxlamb… @nand2mario @machdyne #FPGA #USB #RISCV #FORTH #j1
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BoxLambda Devlog: The Interconnect, Harvard Architecture, and Dual-Port RAM. epsilon537.github.io/boxlamb… #RISCV #FPGA
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BoxLambda Devlog: An attempt at a PicoRV32-based Soft DMA Controller - Part 2 - Optimizations. epsilon537.github.io/boxlamb… #RISCV #FPGA
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A new post on the BoxLambda Devlog: An attempt at a PicoRV32-based Soft DMA Controller. epsilon537.github.io/boxlamb… #FPGA #RISCV
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