Codasip retweeted
Replying to @Codasip
@Codasip launches Codasip Prime, the first #CHERI-enabled RISC-V development platform based on the X730 CPU. Built for secure, memory-safe apps in consumer, auto, and defense sectors. #Cybersecurity #Codasip #SecureSoftware #FPGA #EmbeddedSystems
electronicsmedia.info/2025/0…
Codasip retweeted
Hackathon Online is about to kick off — starting Thursday, April 10 at 7AM PST!
A few key things before you dive in:
✅ Pick your project — Andes or Codasip!
✅ Prep before the weekend — get your setup ready and troubleshoot early!
✅ Got questions? Ask them on Slack!
Our mentors and team will be actively online April 10–11 (Thurs–Fri), so be sure to get your questions in before the weekend. You can start asking now — don’t wait!
Let’s make it an awesome #hackathon! 💪🔥 #RISCVhackathon
Register and get started now: hubs.la/Q03fVqV50
Codasip retweeted
🚀 DARE SGA1 has launched! 🚀
A €240M and 38 partners initiative, to build #Europe’s first fully European #HPC & #AI stack—from #RISCV #processors to an optimized #software ecosystem.
🔗 dare-riscv.eu/launch-of-dare…
@risc_v @EuroHPC_JU @BSC_CNS
Codasip retweeted
Replying to @FlorianWoh @risc_v @RedHat @fedora @jefro_net @Andes_Tech @pulp_platform @OpenHWFdn @siliconlabs
Also CHERI was presented thanks to @TakaakiAkashi of @Codasip who helped to organize this workshop.
I liked it a lot and also listen to Capabilities Limited
#RISCV #CHERI #SEMICONDUCTOR
Codasip retweeted
RISC-V is making waves on the global stage and driving innovation forward, showcasing the latest advancements at @embedded_world 2025! As an embedded world Community Partner, we’re thrilled to present the Powered by RISC-V sessions happening in Germany!
📅 March 12, 2025 | 10:00-11:45 CET
📍 Nuremberg Messezentrum, NCC Ost Convention Center
Use the promo code EWC25RISCV to get 15% off while registering for Embedded World 2025. Learn more: hubs.la/Q036d44C0
See you there! #RISCVeverywhere #ew25
@MicrochipTech Quintauris @Codasip
Codasip retweeted
Innovation on RISC-V is not slowing down.
At the #RISCVSummit, @AllAboutCircuit highlighted advancements that are driving RISC-V adoption, from the ratification of the RVA23 Profile to developments from @Andes_Tech, @arteris_noc, and @Codasip.
🔗 hubs.la/Q02X_Sf40
Codasip retweeted
Our computing engine integrating #Menta's eFPGA IP, @Codasip's RISC-V CPU, and @CEA_Officiel's C-SRAM, is now fully deployed on the NimbleAI prototyping MPSoC – ready to process data structures generated by @IKERLANofficial's BEGI from DVS inputs.
Codasip retweeted
Codasip opens up SDK for CHERI protection on RISC-V chips dlvr.it/TFdv99
Codasip retweeted
🌟【RISC-V Day Tokyo 2024 Summer】🌟 Join us on August 1st! 📅Aug 1, 8:00-18:00 📍Ito International Research Center, University of Tokyo 🔗Details: riscv.or.jp/2024/07/invitati… @Codasip @Andes_Tech @Renesas_Japan
#lauterbach @VentanaMicro @verisilicon
Codasip retweeted
According to @ABIresearch, RISC-V chip shipments in edge AI is expected to reach 129 million by 2030. Join us at the #RISCVSummitEurope to learn more about #RISCV in AI, featuring leaders from @Codasip, @semidynamics, and more. hubs.la/Q02CKxkY0 #RISCVeverywhere
Codasip retweeted
コダシップ、業界最高レベルの電力効率を達成したカスタマイズ可能なRISC-Vコアと次世代ツールCodasip Studio Fusionを発表 prtimes.jp/main/html/rd/p/00… @Codasip #RISCV #RISC_V #CustomCompute #CHERI
Codasip retweeted
FREE EVENT 📣 Students and RISC-V enthusiasts in the Munich area!!! Join us for an in person hackathon in partnership with @Codasip and @RenesasGlobal on Monday 24 June. Secure your spot now: hubs.la/Q02yNjNs0 🗓️ #RISCVSummitEurope #RISCVhackathon
Codasip retweeted
What’s the Difference Between Conventional Memory Protection and CHERI? 👉 bit.ly/3Pf7puJ
Catchup on this latest in-depth article on #CHERI from @Codasip & read more on how #CHERI can rigorously prevent some of the worst memory safety issues.
@UKRI_News @Cambridge_CL
Codasip retweeted
🏆 Exciting News! 🏆 We're thrilled to announce that @Codasip's, CHERI Technology has been shortlisted for the Electronics Excellence Award! 🌟
Find out more here 👉 bit.ly/4azaVJj
#electronicsexcellenceaward #award #embeddedworld #shortlist #products #codasip
Codasip retweeted
We're live:
"It's time to act. There are players coming into the #automotivemarket that aren't waiting."
-Jamie Broome, @Codasip
Register to view: automotiveforum.eetimes.com/
#AutomotiveTechForum
Codasip retweeted
The build-up to this year’s Embedded World event (9th to 11th April, Nuremberg) continues, with news about an array of exciting innovations that visitors will be able to see. Featuring - @Codasip. @Virscient, @SECO, @ADLINK_Tech & @MouserElecEU.
epdtonthenet.net/article/204…
Codasip retweeted
Ready for some fun? 🎥🌟 Join our Video Contest! Fantastic prizes for the most compelling and creative entries. 🏆 Find out all the details and guidelines for the contest here: hubs.la/Q02mclXL0 #RISCVcontest
Codasip retweeted
At SLO-chip 2024, @Codasip’s Dr. Tadej Murovič discussed how Codasip and #RISCV are revolutionizing the future of processors. Watch the full video here! hubs.la/Q02nnc7g0 #RISCVeverywhere
Codasip retweeted
Europe Seeks Chip Sovereignty Using RISC-V eetimes.com/european-union-s…
#riscv @BSC_CNS @risc_v @MWCapital @semidynamics @Codasip @eetimes
Codasip retweeted
Wonderful blog. Most modern cryptographic encryption algorithms suffer from low relative performance, especially the one which are hardware intensive like the SHA512 and AES. The beauty of RISC-V is it's modularity and their plethora of extensions.
codasip.com/2024/01/31/effec…



























