Electronut Labs (@electronutLabs) header
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Embedded Systems, Open Source Hardware. Founded by @mkvenkit

Bengaluru, Karnataka 🇮🇳
Joined November 2014
Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)Photo by Electronut Labs (@electronutLabs)
Electronut Labs retweeted
The Humble iCE kit is shaping up. The FPGA board is ready for production, and the PMODs are getting there...🙂
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Electronut Labs retweeted
Wow! Here's the CERN news about this detector, with a link to the paper: home.cern/aegis-transforms-s…
The AEgIS experiment at CERNs Antimatter Factory uses 60 IMX686 CMOS sensors to maybe see a moiré pattern in antiatoms after passing through gratings. The tinfoil-hat-crowd will love the PCB design 👁️
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Electronut Labs retweeted
Fascinating. This is for Easy EDA, but I wonder what's the status for kicad.
AIが設計した回路(キーボード) 到着 一発動作!!! 凄すぎる。
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Electronut Labs retweeted
Met with a representative of PCB Power - hopefully they will do more to support makers in India. I hope to manufacture Humble iCE sold in India locally.
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Electronut Labs retweeted
Working on some production testing ideas for Humble iCE (FPGA)...
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Electronut Labs retweeted
Raptor test ✅ 😀
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Electronut Labs retweeted
Humble iCE (@latticesemi iCE40UP5k budget FPGA board) is production-ready. I am putting together a kit and something else as well. Stay tuned! 🙂
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Electronut Labs retweeted
Generating VGA signals might be regarded as the "Hello World" for FPGAs. Here, images are read into the block RAM of Humble iCE (iCE40UP5k) FPGA for the tiled background and the bouncing sprite.
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Electronut Labs retweeted
Google’s Tensor Processing Unit (TPU) uses the systolic array architecture - an idea from 1978 - to accelerate matrix multiplication with far less memory movement. Fun to build a small scale version on an FPGA. Links to original paper and TPU design:
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Electronut Labs retweeted
For the curious, the chip is MSPM0C1104. Block diagram:
Texas Instruments has released a microcontroller measuring just 1.38 mm² — small enough to sit comfortably on a fingertip — at a unit price of around 20 cents. The chip is designed for ultra-low-power applications including medical wearables, hearables, and compact IoT devices, where both size and cost are critical constraints. At this scale, integrating processing capability into disposable or implantable medical devices becomes economically viable for the first time. TI positions the design as one of the smallest MCUs available in mass production today. #TinyTech #Microcontroller #Innovation #EmbeddedWorld #TI #Wearables
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Electronut Labs retweeted
One of the fascinating things about FPGAs is that you can resurrect obsolete chips. Here's an SN76489 (TI sound generator) core created by Matthew Hagerty running on the Humble iCE iCE40UP5k board, output via I2S. Core Link:
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Electronut Labs retweeted
generate/for is an example of a commonly used Verilog construct. Unlike a software loop, it runs at elaboration (compile) time - the loop in this case instantiates three I2S stereo receivers, reading data from 6 mics concurrently on an FPGA.
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Electronut Labs retweeted
Following up on the above, you can synthesize the correct circuit by changing the order of the blocking assignments.
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Electronut Labs retweeted
One of the aha moments I went through with Verilog HDL is that you're not writing a program, but describing a circuit. Took me time to develop intuition about what hardware my code was synthesising to on FPGA. Here's a classic example with blocking vs. non-blocking assignments:
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Electronut Labs retweeted
If you're starting with FPGAs, take a look at implementing I2S - a simple, useful protocol to read data from an I2S mic or generate digital audio and send to an I2S amp. The spec provides reference circuits you can follow, or you can take the behavioral modeling approach. Spec:
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Electronut Labs retweeted
In FPGA designs you will sometimes need a one clock pulse (called a strobe) at a lower frequency. Eg. baud rate generator for UART, I2S clock, etc. ZipCPU has a great technique for this which I have used many times: The Fractional Clock Divider. Read about it here:
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Electronut Labs retweeted
AI sucking the joy out of programming is making me turn to retro computers🙂. Here's an interesting 2004 student project from MIT: The Design and Implementation of the Nintendo Entertainment System. CPU + PPU + VGA implemented on FPGAs. PDF link:
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Electronut Labs retweeted
Four books for your FPGA journey, in order of increasing complexity: 1. Designing Video Game Hardware in Verilog: Steven Hugg 2. Verilog by Example: Blaine C. Readler 3. Advanced Digital Design with the Verilog HDL: Michael D. Ciletti 4. Advanced FPGA Design: Steve Kilts
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Electronut Labs retweeted
A continuing implementation of Doom on CV-Wally - thanks Juan!!! Improvements are coming daily - github.com/openhwgroup/cvw - Also check out our new textbook, if you have not seen shop.elsevier.com/books/risc… --> CV-Wally DOOM youtu.be/BBkvet0Lh4Y?si=-hCp…
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Electronut Labs retweeted
Been reading Digital Design and Computer Architecture, RISC-V Edition by Harris & Harris. Love the book, especially because there are over a 100 lectures by the authors on YouTube covering most of the book. (1/2)
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