Mike Butts (@KC7IT) profile picture

Custom Computing on FPGAs (FCCMs). Developing a manycore RISC-V Kahn Process Network overlay.

Portland, OR
Joined July 2010
Photo by Mike Butts (@KC7IT)Photo by Mike Butts (@KC7IT)Photo by Mike Butts (@KC7IT)
"In recent weeks, the nation has seen a frantic effort to increase ventilator production... We should feel the same sense of urgency to figure out how to increase the nation's coronavirus testing capacity." trib.al/NvDWOkz
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Potentially important, but they left out one thing...latency. No mention of latency across the interface, just bandwidth. Some applications, such as multi-die programmable logic, depend heavily on latency for performance. Should at least be documented in the comparison charts.
A look at a Bunch of Wires (BoW), a new open standard chiplets interconnect being proposed by the OCP ODSA group intended for standard organic multi-chip packages as a cheaper alternative to silicon interposers and bridges. #chiplets @OpenComputePrj fuse.wikichip.org/news/3199/…
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Mike Butts retweeted
I only just tonight put together, thanks to @sarahjeong, that *both* science fiction and computer programming were invented by women pissed off at Lord Byron.
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I'm writing an online book: "FPGA Design Elements", which provides a reference library of fundamental digital logic design elements. Think of it as a hardware analog to the C Standard Library ("libc") and its documentation. fpgacpu.ca/fpga/index.html github.com/laforest/FPGADesi… #FPGA
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Arm finally blows its most important guiding principle and allows custom instructions (and the start of software fragmentation). Easy to do. Impossible to undo.
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Very glad to have found this. I’m looking forward to using bft-flow in a RISC-V manycore I’m developing.
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Me: How did you get interested in computer architecture? High-school student: I was building a microprocessor in Minecraft and went through the computer architecture lectures by @_onurmutlu_ Me: What?
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For FPGA folks (@mithro, @xobs, @TinyFPGA, @esden): You can (and should) sell FPGA based hardware without ever mentioning toolchains and verilog. Make it easy to load pre-built cores first and foremost. From @TheRetroManCave youtu.be/e5yPbzD-W-I
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What is a word for a pace even slower than glacial? @jangray isn't the only one doing kilocore RISC-V in FPGA. I've hacked a version of my Glacial RISC-V core to run 1024 cores in an XC7A50. They're run serially, though, not in parallel.
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This is amazing. For *years* people talked about when we’d reach the tipping point where renewables were demonstrably cheaper than fossil fuels. Well, the future is here. forbes.com/sites/jeffmcmahon…
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Good news on CO2 capture.
A massive reforestation effort could capture 205 gigatons of CO2 over the next 40-100 years—two thirds of all the CO2 humans have generated since the industrial revolution. scientificamerican.com/artic…
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An impressive milestone for FPGA-based custom computing.
Researchers have developed the first full-scale FPGA-based Molecular Dynamics simulation engine that completely removes the dependency on off-chip devices, thus eliminating the communication overhead of data transfer. #HPC arxiv.org/pdf/1905.05359.pdf
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Mike Butts retweeted
The nice thing about building throughput-optimized processing elements is that speculation is usually the wrong approach.
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Mike Butts retweeted
#FPGA #FCCM2019 videos: fccm.org/home/media/ Sunday: @risc_v / soft processors program, including a fantastic 90 min "@risc_v in Custom Computing Machines" tutorial by David Donofrio, Farzad Fatollahi-Fard, and @TactCompLabs; and our panel session. drive.google.com/drive/folde…
An impressive body of work, discussed and documented really well. Thanks for publishing this.
I've wrapped up the Octavo project. TLDR: it works, it's fast, it proved its concepts, but it's too hard to program. Detailed post-mortem and architectural diagrams and descriptions are here: fpgacpu.ca/octavo/index.html Code will remain on Github: github.com/laforest/Octavo #FPGA #CPU
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Mike Butts retweeted
Just finished first version of my #FPGA display controller. Easily adds graphics to FPGA projects with VGA, DVI, or HDMI. It can generate TMDS or use @bml_khubbard DVI Pmods. Detailed guide forthcoming; in the meantime constructive feedback is sought: github.com/projf/display-con…
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